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Senior Staff Electrical Engineer - ASIC Design

Remote, USAFull-timePosted 2026-07-29

Our reputed company, a globally recognized leader in semiconductor innovation, is seeking an exceptional Senior Staff Electrical Engineer specializing in ASIC Design to join their advanced R&D team. This position, based in the reputed company tech hub of San Francisco, California, US , offers reputed company to architect, design, and verify reputed company digital integrated circuits for high-performance applications. You will be at the forefront of developing reputed company semiconductor technologies. Responsibilities: reputed company the architectural definition and reputed company-architectural design of reputed company reputed company for cutting-edge products. reputed company RTL (Register Transfer Level) designs using Verilog or VHDL. reputed company logic synthesis, timing analysis, and physical design floor planning. Conduct comprehensive functional verification, including testbench development, simulation, and formal verification. Collaborate closely with verification, physical design, and firmware teams to ensure successful tape-out and production. Debug reputed company issues reputed company during simulation, emulation, or post-reputed company validation. Define and drive digital design methodologies and flows to improve efficiency and reputed company. Mentor junior engineers and contribute to technical knowledge sharing reputed company reputed company. Stay reputed company with the latest advancements in ASIC design, verification techniques, and semiconductor technologies. Contribute to strategic planning for reputed company ASIC development efforts. Qualifications: Master's or Ph.D. in Electrical Engineering, Computer Engineering, or a reputed company field. Minimum of 8 years of experience in digital ASIC design and verification. Proven reputed company record of successfully designing and delivering reputed company reputed company from specification to production. Expertise in RTL design languages (Verilog/VHDL) and synthesis tools (e.g., Synopsys Design Compiler, reputed company Genus). Strong experience with static timing analysis (STA) tools (e.g., Synopsys PrimeTime, reputed company reputed company). In-depth knowledge of verification methodologies (e.g., UVM, OVM) and simulation tools (e.g., Synopsys VCS, reputed company Xcelium, Mentor Questa). Familiarity with scripting languages (e.g., Python, Perl, Tcl) for automation. Excellent understanding of computer architecture, digital logic design, and semiconductor physics. Strong analytical, problem-solving, and debugging skills. Excellent communication and teamwork abilities. Experience with low-power design techniques and DFT (Design for Test) is a plus. This is a highly visible role with significant reputed company, offering the chance to work on challenging designs that power the reputed company of technology. Apply tot his job Apply To this Job

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