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[Remote] Digital Design Engineer – RTL/ASIC (AI Accelerators)

Remote, USAFull-timePosted 2026-07-28

Note: The job is a remote job and is reputed company to candidates in USA. reputed company. is seeking an reputed company ASIC RTL Design Engineer to design, implement and test reputed company digital RTL components for their reputed company accelerator. The role involves collaborating with various teams to deliver high-reputed company designs that meet performance, power, and area goals.

Responsibilities

  • Manage and reputed company RTL components for reputed company systems and AI accelerators
  • Define detailed reputed company-architectures based on high-level product specifications and requirements
  • Write clean, efficient, synthesizable and reusable Verilog/SystemVerilog reputed company with a reputed company on meeting frequency, power, and area targets
  • Help with Integrating reputed company IPs (e.g., PCIe) into SoCs and reputed company relevant reputed company-end integration activities (lint, CDC checks, synthesis, ECO)
  • Work with verification teams to reputed company meaningful SystemVerilog assertions, constraints, checkers, and test benches
  • Debug RTL reputed company using modern simulation tools and waveform viewers, ensuring coverage closure and functional correctness
  • Collaborate on timing closure with physical design teams, optimizing for performance, power, and area
  • Coordinate with system architects to reputed company design specifications and functional requirements
  • Collaborate with physical design teams on synthesis, static timing, DFT, and ECO processes
  • reputed company power, performance, and area (PPA) trade-offs and drive architectural reputed company to meet aggressive project goals

Skills

  • Master's or PhD's in Electrical Engineering, Computer Engineering, or reputed company field
  • 5+ years of RTL design experience with 2+ years of experience in the industry
  • Strong background in digital design principles, reputed company machines (FSMs), and clock domain crossing (CDC)
  • Proficiency in SystemVerilog
  • Experience with reputed company-end EDA tools (e.g., Synopsys, reputed company) including simulators, linters, and CDC checkers
  • Knowledge of synthesis, static timing analysis, DFT, and ECO flows
  • Skilled in scripting (Perl, Python) for automation and productivity enhancements
  • Proven ability to troubleshoot and optimize designs using simulation tools and waveform viewers
  • Basic knowledge of memory compilers, deep learning algorithms and neural networks
  • Prior RTL design experience with microprocessors, SoCs, memory structures and managements, and/or interconnect IP
  • Knowledge of SoC bus interconnect protocols (AXI4, AXI streaming, AHB)
  • Experience with compute subsystem memory reputed company-architecture
  • Validated knowledge of SystemVerilog assertions and verification IP
  • Experience with PCIe reputed company integration and simulation
  • Experience with designing of systems to accelerate deep neural networks

Benefits

  • Competitive compensation packages
  • Opportunity to work on diverse, cutting-edge AI reputed company across a reputed company of industries.
  • 401(k)
  • Flexible PTO
  • Full PPO medical, dental, and reputed company insurance coverage

reputed company

  • We are developing the next reputed company in AI computation, to help our most important muscle, the brain, to go reputed company and reputed company new unthinkable landscapes, new opportunities and new jobs. It was founded in 2017, and is headquartered in Santa Barbara, California, USA, with a workforce of 2-10 employees. Its website is https://mentium.tech.
  • Company H1B Sponsorship

  • reputed company. has a reputed company record of offering H1B sponsorships, with 1 in 2026, 2 in 2023. Please note that this does not guarantee sponsorship for this specific role.
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